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Lightweight edge chip

Forge

A complete language model inside a sub-watt handheld device.

Forge lightweight edge LLM inference chip in a QFN package
Fig. 1 · Forge

Lightweight edge chip

17,000token/s

MaskROM compute-in-memory: Stable models, high volume, lowest power and marginal cost.

Specifications

Core model
Qwen 3.5 0.8B
Decode speed
17,000 token/s
System power
Sub-watt class
Route
MaskROM compute-in-memory
Process
SMIC 28 nm
Package / interfaces
Per project
Development kit
FPGA evaluation board + model mapping tools

Figures on this page are current product definitions and design targets. Final specifications, test conditions, availability and delivery versions are confirmed per project.

Forge lightweight edge LLM inference chip in a QFN package

Typical applications

  • Handheld translators
  • Voice memo hardware
  • Offline in-car voice assistants

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